Memory heirarchy
- Registers: 64-bit registers: 64 float, 64 int
- Level 1 cache:
- 32K instructions, 32K data
- 32B cacheline for data
- 2-way set associative
- non-blocking
- Level 2 cache:
- possible sizes:
- .5-16 MB
- 4-8 MB (current SGI servers)
- 128 byte cacheline
- 2-way set associative
- non-blocking