CUG 2006 home page
Final Program
and Proceedings

Attendee List

Go to the pages for Monday-Thursday to find papers presented that day.
To search for a paper by session, title, author, or abtract text, go to the Program Abstracts page.
Final Program in PDF format Monday Tuesday Wednesday Thursday


17 Technical Sessions
17A FPGAs & Supercomputers
(Room B1)
Chair: Peter Cebull (INL)
17B Parallel Programming
(Room B2)
Chair: John Noe (SNLA)
17C Mass Storage
(Room B3)

Chair: Brad Blasing (NCS-MINN)
Turning FPGAs Into Supercomputers—Debunking the Myths About FPGA-based Software Acceleration, Anders Dellson, Mitrionics AB Slides for this Presentation Hybrid Programming Fun: Making Bzip2 Parallel with MPICH2 and pthreads on the XD1, Charles Wright (ASA) Slides for this Presentation Lustre File System Plans and Performance on Cray Systems, Charlie Carroll and Branislav Radovanovic, Cray Inc. Slides for this Presentation
Experiences with High-Level Programming of FPGAs on Cray XD1, Thomas Steinke, Konrad Zuse-Zentrum für Informationstechnik Berlin; Thorsten Schuett and Alexander Reinefeld, Zuse-Institut Berlin Slides for this Presentation Parallel Performance Analysis on Cray Systems, Craig Lucas and Kevin Roy (MCC) Slides for this Presentation
Experiences Harnessing Cray XD1 FPGAs and Comparisons to other FPGA High Performance Computing (HPC) Systems, Olaf Storaasli, Melissa C. Smith, and Sadaf R. Alam (ORNL) Slides for this Presentation An Evaluation of Eigensolver Performance on Cray Systems, Adrian Tate and John G. Lewis, Cray Inc.; Jason Slemons, University of Washington A Center Wide File System Using Lustre, Shane Canon and H. Sarp Oral (ORNL) Slides for this Presentation
Status Report of the OpenFPGA Initiative: Efforts in FPGA Application Standardization, Eric Stahlberg, Kevin Wohlever (OSC); Dave Strenski, Cray Inc. Slides for this Presentation Symmetric Pivoting in ScaLAPACK, Craig Lucas (MCC) Slides for this Presentation
18 Technical Sessions
18A Operating Systems—UNICOS
(Room B1)
Chair: Brad Blasing (NCS-MINN)
18B Libraries—MPI
(Room B2)
Chair: Mike Pettipher (MCC)
18C Eldorado/MTA2
(Room B3)

Chair: Robert A. Ballance (SNLA)
Recent Trends in Operating Systems and their Applicability to HPC, Rolf Riesen and Ron Brightwell (SNLA); Patrick Bridges and Arthur Maccabe, University of New Mexico Slides for this Presentation Message Passing Toolkit (MPT) Software on XT3, Howard Pritchard, Doug Gilmore, and Mark Pagel, Cray Inc. Slides for this presentation Graph Software Development and Performance on the MTA-2 and Eldorado, Jonathan Berry and Bruce Hendrickson (SNLA) Slides for this Presentation
Compute Node OS for XT3, Jim Harrell, Cray Inc. Slides for this Presentation Open MPI on the XT3, Brian Barrett, Jeff Squyres, and Andrew Lumsdaine, Indiana University; Ron Brightwell (SNLA) Slides for this Presentation Evaluation of Active Graph Applications on the Cray Eldorado Architecture, Jay Brockman, Matthias Scheutz, Shannon Kuntz, and Peter Kogge, University of Notre Dame; Gary Block and Mark James, NASA JPL; John Feo, Cray Inc. Slides for this Presentation
XT3 Status and Plans, Charlie Carroll and David Wallace, Cray Inc. Slides for this Presentation What if MPI Collectives Were Instantaneous? Rolf Riesen and Courtenay Vaughan (SNLA) Slides for this Presentation Scalability of Graph Algorithms on Eldorado, Keith Underwood, Megan Vance, Jonathan Berry, and Bruce Hendrickson (SNLA) Slides for this Presentation Slides for this Presentation
Lunch Atrio/Foyer, Ground Floor
19 Technical Sessions
19A Sizing: Page, Cache, & Meshes
(Room B1)
Chair: Robert A. Ballance (SNLA)
19B XD1 Applications
(Room B2)
Chair: Kevin Wohlever (OSC)
19C Benchmarking/Comparison
(Room B3)
Chair: David Gigrich (BOEING)
The Effect of Page Size and TLB Entries on XT3 Application Performance, Neil Stringfellow (CSCS) Slides for this Presentation Alef Formal Verification and Planning System, Samuel Luckenbill, James R. Ezick, Donald D. Nguyen, Peter Szilagyi, and Richard A. Lethin, Reservoir Labs, Inc. Slides for this Presentation Performance Comparison of Cray X1 and Cray Opteron Cluster with Other Leading Platforms Using HPCC and IMB Benchmarks, Subhash Saini (NAS); Rolf Rabenseifner (HLRS); Brian T. N. Gunney, Thomas E. Spelce, Alice Koniges, and Don Dossa (LLNL); Panagiotis Adamidis (HLRS); Robert Ciotti (NAS); Sunil R. Tiyyagura (HLRS); Matthias Müller, Dresden University of Technology; Rod Fatoohi, San Jose State University Slides for this Presentation
Performance Characteristics of Cache-Insensitive Implementation Strategies for Hyperbolic Equations on Opteron Based Super Computers, David Hensinger and Chris Luchini (SNLA) Slides for this Presentation XD1 Implementation of a SMART Coprocessor for Fuzzy Matching in Bioinformatics Applications, Eric Stahlberg and Harrison Smith (OSC) Slides for this Presentation Performance Analysis of Cray X1 and Cray Opteron Cluster, Panagiotis Adamidis (HLRS); Rod Fatoohi, San Jose State University; Johnny Chang and Robert Ciotti (NAS); Subhash Saini, NASA Ames Slides for this Presentation
Investigations on Scaling Performance and Mesh Convergence with Sandia's ASC FUEGO Code for Fire Model Predictions of Heat Flux, Courtenay Vaughn, Mahesh Rajan and Amalia Black (SNLA) Slides for this Presentation Simulating Alzheimer on the XD1, Jan H. Meinke and Ulrich H. E. Hansmann (KFA) Slides for this Presentation An Accelerated Implementation of Portals on the Cray SeaStar, Ron Brightwell, Trammell Hudson, Kevin Pedretti, and Keith D. Underwood (SNLA) Slides for this Presentation
20 General Session (Room B1) Chair: CUG President
The AWE HPC Benchmark 2005, Ron Bell, S. Hudson, and N. Munday (AWE) Slides for this Presentation
Next CUG (Seattle), Hank Heeb (BOEING)
LAC Appreciation and Adjournment, CUG President
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